Abstract

The three-value simulator has been used on both rentral processing units and input/output controllers with microprogram control and hardware control. Four major systems have been simulated and built. The experience thus gained has indicated that: (1) It is possible to include simulation in a development cycle and as a result shorten that cycle, even in a changeable technology; (2) The efficiency of debugging hardware will improve because those testing the system have an opportunity to develop their troubleshooting techniques and to learn the computer system prior to the availability of hardware; (3) Logic problems that might otherwise remain undetected can be detected with three-value simulation; and (4) Future technologies will demand design verification simulators similar to the three-value simulator.

Keywords

DebuggingTroubleshootingComputer scienceValue (mathematics)Embedded systemControl (management)Control logicComputer hardwareSimulationComputer architectureOperating system

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Publication Info

Year
1969
Type
article
Volume
8
Issue
3
Pages
178-188
Citations
57
Access
Closed

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J. S. Jephson, R. P. McQuarrie, R. E. Vogelsberg (1969). A three-value computer design verification system. IBM Systems Journal , 8 (3) , 178-188. https://doi.org/10.1147/sj.83.0178

Identifiers

DOI
10.1147/sj.83.0178