Abstract

This paper presents several on-chip antenna structures that may be fabricated with standard CMOS technology for use at millimeter wave frequencies. On-chip antennas for wireless personal area networks (WPANs) promise to reduce interconnection losses and greatly reduce wireless transceiver costs, while providing unprecedented flexibility for device manufacturers. This paper presents the current state of research in on-chip integrated antennas, highlights several pitfalls and challenges for on-chip design, modeling, and measurement, and proposes several antenna structures that derive from the microwave microstrip and amateur radio art. This paper also describes an experimental test apparatus for performing measurements on RFIC systems with on-chip antennas developed at The University of Texas at Austin.

Keywords

Antenna (radio)Computer scienceTransceiverCMOSWirelessChipElectrical engineeringExtremely high frequencyMicrostrip antennaRFICOmnidirectional antennaSystem on a chipReconfigurable antennaElectronic engineeringRadio frequencyTelecommunicationsEmbedded systemAntenna efficiencyEngineering

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Publication Info

Year
2009
Type
article
Volume
27
Issue
8
Pages
1367-1378
Citations
246
Access
Closed

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Cite This

F. Gutierrez, Swapnil Agarwal, Kristen N. Parrish et al. (2009). On-chip integrated antenna structures in CMOS for 60 GHz WPAN systems. IEEE Journal on Selected Areas in Communications , 27 (8) , 1367-1378. https://doi.org/10.1109/jsac.2009.091007

Identifiers

DOI
10.1109/jsac.2009.091007