Abstract
The need to transfer information between processing elements can be a major factor in determining the performance of a VLSI circuit. We show that communication considerations alone dictate that any VLSI design for computing the 2 n -bit product of two n -bit integers must satisfy the constraint AT 2 ≥ n 2 /64 where A is the area of the chip and T is the time required to perform the computation. This same tradeoff applies to circuits which can shift n -bit words through n different positions.
Keywords
Very-large-scale integrationComputer scienceMultiplication (music)ComputationInformation transferConstraint (computer-aided design)ArithmeticTransfer (computing)Product (mathematics)ChipElectronic circuitTheoretical computer scienceParallel computingComputer engineeringAlgorithmMathematicsEmbedded systemTelecommunicationsEngineeringElectrical engineering
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Publication Info
- Year
- 1980
- Type
- article
- Volume
- 23
- Issue
- 1
- Pages
- 20-23
- Citations
- 71
- Access
- Closed
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Cite This
Harold Abelson,
Peter Andreae
(1980).
Information transfer and area-time tradeoffs for VLSI multiplication.
Communications of the ACM
, 23
(1)
, 20-23.
https://doi.org/10.1145/358808.358814
Identifiers
- DOI
- 10.1145/358808.358814